Generally, a semiconductor package is formed by mounting a semiconductor chip on a substrate and molding a single module of a structure connecting the semiconductor chip and a lead frame by a clip or a bonding wire with a thermosetting material such as an epoxy molding compound (EMC) to form a package body.
The semiconductor package exhausts heat generated from the semiconductor chip mounted in the body by being coupled to a separate heat slug. However, since an amount of generated heat of a highly integrated semiconductor package is large, it is difficult to expect smooth heat exhaust by the heat slug.
Specifically, the semiconductor package is provided in a converter or an inverter connected to a battery of an electric vehicle and in this case, a heat dissipating function of the semiconductor is closely related to an efficiency of the battery.
Related arts trying to improve a heat dissipation effect will be described below.
First, Korean Registered Patent No. 10-0648509 (A tape-type lead frame strip, a lead exposed semiconductor chip package using the same, and a manufacturing method) suggests a technology including a semiconductor chip including a bonding pad, a pattern lead connected to the bonding pad by a wire, and a package body which seals the semiconductor chip, the wire, and the pattern lead and is formed by outwardly exposing a lower portion of the semiconductor chip and a lower portion of the pattern lead.
According to the above-described related art, the heat generated in the semiconductor chip is exhausted only through a lower portion so that the heat dissipation effect is low and the exposed pattern lead is connected by the wire so that the heat is not easily dissipated. That is, the wire is attached by bonding and transmits just an electrical signal but the heat is not transferred to the pattern through the wire so that it is difficult to expect high heat exhaust effect.
Second, Korean Registered Patent No. 10-1461197 (COF type semiconductor chip package having heat dissipation structure) suggests a technology configured by a first heat dissipation resin layer applied between a semiconductor chip and a film and a second heat dissipation resin layer which is applied on the film to be in contact with a side of the semiconductor chip and exposes a top surface of the semiconductor chip to the outside.
According to the above-described related art, the semiconductor chip is disposed on the film to be connected with an electrode pattern through a bump so that heat generated from the semiconductor chip is exhausted only to the exposed upper portion but is not exhausted to the lower portion to which the film is attached. Further, a package body which protects the semiconductor chip and individual configurations is not provided so that it is difficult to be connected using a lead frame or a wire and the semiconductor chip and the configurations are easily damaged by vibration or impact.
Third, Korean Registered Patent No. 10-0475313 (Method for assembling stacked double chip semiconductor package using adhesive tape) suggests a technology including a first step of forming an adhesive layer for die bonding on a chip paddle of a frame material used for a semiconductor package assembling process, a second step of attaching a first semiconductor chip onto the adhesive layer, and a third step of attaching a second semiconductor chip attached with an adhesive tape for die bonding on a bottom surface, above the first semiconductor chip.
The above-described related art is a technology which attaches the first semiconductor chip and the second semiconductor chip by a liquefied epoxy and an adhesive tape. However, this technology is also formed by a stacked structure so that a heat dissipation effect of the semiconductor package is lowered and it is difficult to effectively dispose the semiconductor chip due to the structure.